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| Data Sheet October 2001 Dual Differential Transceivers BTK1A and BTM1A Features Driver Features s s Description The BTK1A and BTM1A devices are dual differential transceiver circuits that transmit and receive digital data over balanced transmission lines and are compatible with Agere Systems Inc. quad differential drivers and receivers. The dual drivers translate input TTL logic levels to differential pseudo-ECL output levels. The dual receivers convert differential input logic levels to TTL output levels. Each driver/receiver pair has its own common enable control allowing serial data and a control clock to be transmitted and received on a single integrated circuit. The BTK1A transceiver requires the customer to supply termination resistors on the circuit board. The BTM1A transceiver has an internal resistor termination for both the driver outputs (220 ) and receiver inputs (110 ), eliminating the need for external resistors on the circuit board when used with 100 impedance, twisted-pair (or flat) cable. These transceivers replace the Agere 41 Series transceivers. The powerdown loading characteristics of the receiver input circuit are approximately 8 k relative to the power supplies; hence, they will not load the transmission line when the circuit is powered down. For those circuits with termination resistors, the line will remain impedance matched when the circuit is powered down. The driver does not load the line when it is powered down. The packaging options that are available for the dual differential transceivers include a 16-pin DIP; a 16-pin, J-lead SOJ; a 16-pin, gull-wing SOIC; and a 16-pin, narrow-body, gull-wing SOIC. Two line drivers per package Logic to convert TTL input logic levels to differential, pseudo-emitter coupled logic (ECL) output logic levels No line loading when VCC = 0 V High output driver for 50 loads 200 mA short-circuit current (typical) 2.0 ns maximum propagation delay <0.2 ns output skew (typical) s s s s s Receiver Features s s s Two line receivers per package High input impedance 8 k Logic that converts differential input logic levels to transistor-transistor logic (TTL) output logic levels 4.0 ns maximum propagation delay <0.20 V input sensitivity (typical) -1.2 V to +7.2 V common-mode range s s s Common Device Features s s Common enable for each driver/receiver pair Operating temperature range: -40 C to +125 C (wider than the 41 Series) Single 5.0 V 10% supply 400 Mbits/s maximum data rate Meets enhanced small device interface (ESDI) standards Electrostatic discharge (ESD) performance better than the 41 Series Lower power requirement than the 41 Series s s s s s Dual Differential Transceivers BTK1A and BTM1A Data Sheet October 2001 Pin Information RO1 DI1 VCC ED ER GND DI2 RO2 1 R1 2 3 D1 4 5 D2 6 7 R2 8 BTK1A 16 RI1 15 RI1 14 DO1 13 DO1 12 DO2 11 DO2 10 RI2 9 RI2 RO1 DI1 VCC ED ER GND DI2 RO2 1 R1 2 3 D1 4 5 D2 6 7 R2 8 BTM1A 16 RI1 15 RI1 14 DO1 13 DO1 12 DO2 11 DO2 10 RI2 9 RI2 12-2747.b(F) Figure 1. Differential Transceiver Logic Diagrams Table 1. Enable Truth Table ED 0 1 0 1 ER 0 0 1 1 D1 Active Disabled Active Disabled D2 Active Disabled Active Disabled R1 Active Active Disabled Disabled R2 Active Active Disabled Disabled Absolute Maximum Ratings Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability. Table 2. Absolute Maximum Ratings Parameter Power Supply Voltage Ambient Operating Temperature Storage Temperature Symbol VCC TA Tstg Min -- -40 -55 Max 6.5 125 150 Unit V C C 2 Agere Systems Inc. Data Sheet October 2001 Dual Differential Transceivers BTK1A and BTM1A Electrical Characteristics For variations in electrical characteristics over the temperature range, see Figure 10 on page 10 through Figure 12 on page 11. Table 3. Power Supply Current Characteristics TA = -40 C to +125 C, VCC = 5 V 0.5 V. Parameter Power Supply Current (VCC = 5.5 V): All Outputs Disabled: BTK1A BTM1A All Outputs Enabled: BTK1A BTM1A Symbol Min Typ Max Unit ICC ICC ICC ICC 40 80 20 80 65 115 35 115 mA mA mA mA Third State These drivers produce pseudo-ECL levels, and the third-state mode is different than the conventional TTL devices. When a driver is placed in the third state, the bases of the output transistors are pulled low, bringing the outputs below the active-high and active-low levels. This voltage is typically 2 V for most drivers. In the bidirectional bus application, the driver of one device, which is in its third state, may be back driven by another driver on the bus whose voltage in the low state is lower than the third-stated device. This could come about due to differences in the drivers' independent power supplies. In this case, the device in the third state will control the line, thus clamping the line and reducing the signal swing. If the difference voltage between the independent power supplies and the drivers is small, then this consideration can be ignored. In the typical case, the difference voltage can be as much as 1 V without significantly affecting the amplitude of the driving signal. Agere Systems Inc. 3 Dual Differential Transceivers BTK1A and BTM1A Data Sheet October 2001 Electrical Characteristics (continued) Table 4. Driver Voltage and Current Characteristics For variations in output voltage over the temperature range, see Figure 10 and Figure 11. TA = -40 C to +125 C. Parameter Output Voltages: Low* High*: Differential Voltage (VOH - VOL) Third State, IOH = -1.0 mA, VCC = 4.5 V Output Voltages (TA = 0 C to 85 C): Low* High*: Differential Voltage (VOH - VOL) Input Voltages: Low, VCC = 5.5 V: Data Input Enable Input High, VCC = 4.5 V Clamp, VCC = 4.5 V, II = -5.0 mA Short-circuit Output Current, VCC = 5.5 V Input Currents, VCC = 5.5 V: Low, VI = 0.4 V High, VI = 2.7 V Reverse, VI = 5.5 V Output Resistors: BTM1A RO -- 220 -- Symbol VOL VOH VDIFF VOZ VOL VOH VDIFF VIL VIL VIL VIH VIK IOS IIL IIH IIH Min VOH - 1.4 VCC - 1.8 0.65 -- VOH - 1.4 VCC - 1.5 0.8 -- -- -- 2.0 -- -100 -- -- -- Typ VOH - 1.1 VCC - 1 1.1 VOL - 0.5 VOH - 1.1 VCC - 1 1.1 -- -- -- -- -- -- -- -- -- Max VOH - 0.65 VCC - 0.8 1.4 VOL - 0.2 VOH - 0.8 VCC - 0.8 1.4 0.8 0.8 0.7 -- -1.0 Unit V V V V V V V V V V V V mA A A A -- -400 20 100 * Values are with terminations as per Figure 7. The input levels and difference voltage provide zero noise immunity and should be tested only in a static, noise-free environment. Test must be performed one lead at a time to prevent damage to the device. 4 Agere Systems Inc. Data Sheet October 2001 Dual Differential Transceivers BTK1A and BTM1A Electrical Characteristics (continued) Table 5. Receiver Voltage and Current Characteristics For variation in minimum VOH and maximum VOL over the temperature range, see Figure 10. TA = -40 C to +125 C. Parameter Output Voltages VCC = 4.5 V: Low, IOL = 8.0 mA* High, IOH = -400 A Enable Input Voltages: Low, VCC = 5.5 V High, VCC = 4.5 V Clamp, VCC = 4.5 V, II = -5.0 mA Minimum Differential Input Voltages, VIH - VIL: -0.80 V < VIH < 7.2 V, -1.2 V < VIL < 6.8 V Symbol VOL VOH VIL* VIH* VIK VTH* VOFF IOZL IOZH IOS IIL IIH IIH IIL IIH R1 Min -- 2.4 -- 2.0 -- -- -- -- -25 -- -- -- Typ -- -- -- -- -- 0.1 Max 0.5 -- 0.7 -- -1.0 0.20 Unit V V V V V V Input Offset Voltage Output Currents, VCC = 5.5 V: Off-state (high Z), VO = 0.4 V Off-state (high Z), VO = 2.4 V Short Circuit Enable Input Currents, VCC = 5.5 V: Low, VIN = 0.4 V High, VIN = 2.7 V Reverse, VIN = 5.5 V Differential Input Currents, (BTK1A): Low, VIN = -1.2 V High, VIN = 7.2 V Differential Input Impedance (BTM1A): Connected Between RI and RI 0.03 -- -- -- -- -- -- 0.05 -20 20 -100 V A A mA A A A mA mA -400 20 100 -1.0 -- -- -- -- -- 110 1.0 -- * The input levels and difference voltage provide zero noise immunity and should be tested only in a static, noise-free environment. Outputs of unused receivers assume a logic 1 level when the inputs are left open. (It is recommended that all unused positive inputs be tied to the positive power supply. No external series resistor is required.) Test must be performed one lead at a time to prevent damage to the device. Agere Systems Inc. 5 Dual Differential Transceivers BTK1A and BTM1A Data Sheet October 2001 Timing Characteristics Table 6. Driver Timing Characteristics (See Figure 3 and Figure 4.) For tP1 and tP2 propagation delays over the temperature range, see Figure 13. Propagation delay test circuit connected to output is shown in Figure 7. TA = -40 C to +125 C, VCC = 5 V 0.5 V. Parameter Propagation Delay: Input High to Output Input Low to Output Capacitive Delay Disable Time (either E1 or E2): High-to-High Impedance Low-to-High Impedance Enable Time (either E1 or E2): High Impedance to High High Impedance to Low Output Skew: |tP1 - tP2| |tPHH - tPHL|, |tPLH - tPLL| Difference Between Drivers Rise Time (20%--80%) Fall Time (80%--20%) Symbol tP1* tP2* tp tPHZ tPLZ tPZH tPZL tskew1 tskew2 tskew ttLH ttHL Min 0.8 0.8 -- 4 4 4 4 -- -- -- -- -- Typ 1.2 1.2 0.02 8 8 8 8 0.1 0.2 -- 0.7 0.7 Max 2.0 2.0 0.03 12 12 12 12 0.3 0.5 0.3 2 2 Unit ns ns ns/pF ns ns ns ns ns ns ns ns ns * tP1 and tP2 are measured from the 1.5 V point of the input to the crossover point of the outputs (see Figure 3). CL = 5 pF. Capacitor is connected from each output to ground. Table 7. Receiver Timing Characteristics (See Figure 5 and Figure 6.) For propagation delays (tPLH and tPHL) over the temperature range, see Figure 14 and Figure 15. Propagation delay test circuit connected to output is shown in Figure 8. TA = -40 C to +125 C, VCC = 5 V 0.5 V. Parameter Propagation Delay: Input to Output High Input to Output Low Pulse Width Distortion, ltpHL-tpLHI: Load Capacitance (CL) = 15 pF Load Capacitance (CL) = 150 pF Output Waveform Skews: Part-to-Part Skew, TA = 75 C Part-to-Part Skew, TA = -40 C to +125 C Same Part Skew Disable Time, CL = 5 pF: High-to-high Impedance Low-to-high Impedance Enable Time: High Impedance to High High Impedance to Low Rise Time (20%--80%) Fall Time (80%--20%) 6 Symbol tPLH tPHL tskew1 tskew1 tskew1p-p tskew1p-p tskew Min 1.5 1.5 -- -- -- -- -- -- -- -- -- -- -- Typ 2.5 2.5 -- -- 0.8 -- -- 5 5 8 8 -- -- Max 4.0 4.0 0.7 4.0 1.4 1.5 0.3 12 12 12 12 3.0 3.0 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns tPHZ tPLZ tPZH tPZL ttLH ttHL Agere Systems Inc. Data Sheet October 2001 Dual Differential Transceivers BTK1A and BTM1A Timing Characteristics (continued) EXTRINSIC PROPAGATION DELAY, tP (ns) 7 6 5 4 tPLH (TYP) 3 2 tPHL (TYP) 1 0 0 25 50 75 100 125 150 175 200 LOAD CAPACITANCE, CL (pF) 12-3462(F) Note: This graph is included as an aid to the system designers. Total circuit delay varies with load capacitance. The total delay is the sum of the delay due to the external capacitance and the intrinsic delay of the device. Figure 2. Typical Extrinsic Propagation Delay Versus Load Capacitance at 25 C INPUT TRANSITION 2.4 V 1.5 V 0.4 V tP1 tP2 VOH OUTPUTS VOL tPHH OUTPUT tPLL VOH (VOH + VOL)/2 VOL OUTPUT tPHL OUTPUT tPLH VOH (VOH + VOL)/2 VOL 80% 20% ttLH 80% 20% ttHL VOH VOL 12-2677(F) Figure 3. Driver Propagation Delay Timing Agere Systems Inc. 7 Dual Differential Transceivers BTK1A and BTM1A Data Sheet October 2001 Timing Characteristics (continued) 3.0 V 1.3 V 0.0 V tPHZ tPZH VOH VOL + 0.2 V VOL VOL - 0.1 V ED OUTPUT OUTPUT tPLZ tPZL VOL VOL - 0.1 V 12-2268.c(F) Note: In the third state, both outputs (i.e., OUTPUT and OUTPUT) are 0.1 V below the low state. Figure 4. Driver Enable and Disable Timing INPUT INPUT 3.7 V 3.2 V 2.7 V tPHL OUTPUT 80% 20% ttHL 20% tPLH 80% VOH 1.3 V VOL ttLH 12-2251.a(F) Figure 5. Receiver Propagation Delay Timing 8 Agere Systems Inc. Data Sheet October 2001 Dual Differential Transceivers BTK1A and BTM1A Timing Characteristics (continued) 3V E1* 1.3 V 0V 3V E2 tPHZ tPZH tPLZ tPZL 1.3 V 0V VOH OUTPUT VOL V = 0.5 V 1.3 V V = 0.5 V V = 0.5 V V = 0.5 V 12-2538.a(F) * E2 = 1 while E1 changes state. E1 = 0 while E2 changes state. Figure 6. Receiver Enable and Disable Timing Test Conditions +5 V Parametric values specified under the Electrical Characteristics and Timing Characteristics sections for the data transmission driver devices are measured with the following output load circuits. 100 DO 200 DO 200 12-2271.a(F) TO OUTPUT OF DEVICE UNDER TEST CL 15 pF* 5 k 2 k 12-2249(F) * Includes probe and jig capacitances. Note: All 458E, IN4148, or equivalent diodes. Figure 8. Receiver Propagation Delay Test Circuit BTK1A 100 DO DO 12-2271.b(F) BTM1A Figure 7. Driver Propagation Delay Test Circuit Agere Systems Inc. 9 Dual Differential Transceivers BTK1A and BTM1A Data Sheet October 2001 Output Characteristics Figure 9 illustrates typical driver output characteristics. Included are load lines for two typical termination configurations. Temperature Characteristics OUTPUT VOLTAGE RELATIVE TO VCC 0 -0.5 VOH MAX OUTPUT VOLTAGE (V) VCC - 2 V VCC - 1 V VCC -1.0 -1.5 VOL MAX -2.0 -2.5 -50 VOH MIN OUTPUT CURRENT (mA) VOH 10 Y LOAD VOL 20 VOL MIN -25 0 25 50 75 100 125 150 2-3467(F) 30 LOAD 40 TEMPERATURE (C) 12-2269(F) Figure 10. VOL and VOH Extremes for Drivers Versus Temperature for 100 Load A. Output Current vs. Output Voltage for Loads Shown in B and C 1.2 DIFFERENTIAL VOLTAGE (V) VOH - VOL TYP 1.0 60 DO 60 DO 90 0.8 VOH - VOL MIN 12-2270(F) 0.6 B. Y Load 0.4 0 -50 100 DO 200 DO 200 -25 0 25 50 75 100 125 150 12-3468(F) TEMPERATURE (C) 12-2271.a(F) C. Load Figure 9. Driver Output Current Versus Voltage Characteristics Figure 11. Differential Voltage (VOH - VOL) for Drivers Versus Temperature 10 Agere Systems Inc. Data Sheet October 2001 Dual Differential Transceivers BTK1A and BTM1A Temperature Characteristics (continued) 3.8 3.6 PROPAGATION DELAY (ns) 3.2 VOLTAGE (V) 2.8 2.4 2.0 1.6 1.2 0.8 0.4 0.0 -50 -25 0 VOL MAX 25 50 75 100 125 150 VOH MIN 3.50 MAX 3.00 TYP 2.50 MIN 2.00 1.50 1.00 -50 4.00 -25 0 25 50 75 100 125 150 TEMPERATURE (C) 12-3464.b(F) TEMPERATURE (C) 12-3465(F) Figure 12. Minimum VOH and Maximum VOL Versus Temperature at VCC = 4.5 V for the Receiver Figure 14. Propagation Delay for a High Output (tPLH) Versus Temperature at VCC = 5.0 V for the Receivers 2.3 PROPAGATION DELAY (ns) PROPAGATION DELAY (ns) 2.1 1.9 1.7 1.5 1.3 1.1 0.9 0.7 0.5 0.3 -50 -25 0 25 50 75 100 125 150 RANGE FOR tP1 AND tP2 MAX MIN 4.00 MAX 3.50 3.00 2.50 MIN 2.00 1.50 1.00 -50 TYP -25 0 25 50 75 100 125 150 TEMPERATURE (C) 12-3469.a(F) TEMPERATURE (C) 12-3466(F) Figure 13. Min and Max for tP1 and tP2 Propagation Delays Versus Temperature for the Driver Figure 15. Propagation Delay for a Low Output (tPHL) Versus Temperature at VCC = 5.0 V for the Receivers Agere Systems Inc. 11 Dual Differential Transceivers BTK1A and BTM1A Data Sheet October 2001 Handling Precautions CAUTION: This device is susceptible to damage as a result of electrostatic discharge. Take proper precautions during both handling and testing. Follow guidelines such as JEDEC Publication No. 108-A (Dec. 1988). When handling and mounting line driver products, proper precautions should be taken to avoid exposure to electrostatic discharge (ESD). The user should adhere to the following basic rules for ESD control: 1. Assume that all electronic components are sensitive to ESD damage. 2. Never touch a sensitive component unless properly grounded. 3. Never transport, store, or handle sensitive components except in a static-safe environment. ESD Failure Models Agere employs two models for ESD events that can cause device damage or failure: 1. A human-body model (HBM) that is used by most of the industry for ESD-susceptibility testing and protectiondesign evaluation. ESD voltage thresholds are dependent on the critical parameters used to define the model. A standard HBM (resistance = 1500 , capacitance = 100 pF) is widely used and, therefore, can be used for comparison purposes. 2. A charged-device model (CDM), which many believe is the better simulator of electronics manufacturing exposure. Table 8 and Table 9 illustrate the role these two models play in the overall prevention of ESD damage. HBM ESD testing is intended to simulate an ESD event from a charged person. The CDM ESD testing simulates charging and discharging events that occur in production equipment and processes, e.g., an integrated circuit sliding down a shipping tube. The HBM ESD threshold voltage presented here was obtained by using these circuit parameters. Table 8. Typical ESD Thresholds for Data Transmission Transceivers Device BTK1A BTM1A All other pins HBM Threshold >800 >2000 CDM Threshold >1000 >1000 Table 9. ESD Damage Protection ESD Threat Controls Personnel Control Wrist straps ESD shoes Antistatic flooring Human-body model (HBM) Processes Static-dissipative materials Air ionization Charged-device model (CDM) Model 12 Agere Systems Inc. Data Sheet October 2001 Dual Differential Transceivers BTK1A and BTM1A Latch-Up Latch-up evaluation has been performed on the data transmission receivers. Latch-up testing determines if the power-supply current exceeds the specified maximum due to the application of a stress to the device under test. A device is considered susceptible to latch-up if the power supply current exceeds the maximum level and remains at that level after the stress is removed. Agere performs latch-up testing per an internal test method which is consistent with JEDEC Standard No. 17 (previously JC-40.2) CMOS Latch-Up Standardized Test Procedure. Latch-up evaluation involves the following three separate stresses to evaluate latch-up susceptibility levels: 1. dc current stressing of input and output pins. 2. Power supply slew rate. 3. Power supply overvoltage. Table 10. Latch-Up Test Criteria and Test Results dc Current Stress of I/O Pins Data Transmission Receiver ICs Minimum Criteria Test Results 150 mA 250 mA Power Supply Slew Rate 1 s 100 ns Power Supply Overvoltage 1.75 x Vmax 2.25 x Vmax Based on the results in Table 10, the data transmission receivers pass the Agere latch-up testing requirements and are considered not susceptible to latch-up. Agere Systems Inc. 13 Dual Differential Transceivers BTK1A and BTM1A Data Sheet October 2001 Outline Diagrams 16-Pin DIP Dimensions are in millimeters. L N B 1 PIN #1 IDENTIFIER ZONE W H SEATING PLANE 0.38 MIN 2.54 TYP 0.58 MAX 5-4410(F) Package Description Number of Pins (N) 16 Package Dimensions Maximum Length (L) 20.57 Maximum Width Without Leads (B) 6.48 Maximum Width Including Leads (W) 7.87 Maximum Height Above Board (H) 5.08 PDIP3 (Plastic Dual-In-Line Package) Note: The dimensions in this outline diagram are intended for informational purposes only. For detailed schematics to assist your design efforts, please contact your Agere Sales Representative. 14 Agere Systems Inc. Data Sheet October 2001 Dual Differential Transceivers BTK1A and BTM1A Outline Diagrams (continued) 16-Pin SOIC (SONB/SOG) Dimensions are in millimeters. L N B 1 PIN #1 IDENTIFIER ZONE W H SEATING PLANE 0.10 1.27 TYP 0.51 MAX 0.28 MAX 0.61 5-4414(F) Package Description Number of Pins (N) 16 Package Dimensions Maximum Length (L) 10.11 Maximum Width Without Leads (B) 4.01 Maximum Width Including Leads (W) 6.17 Maximum Height Above Board (H) 1.73 SONB (SmallOutline, Narrow Body) SOG (SmallOutline, GullWing) 16 10.49 7.62 10.64 2.67 Note: The dimensions in this outline diagram are intended for informational purposes only. For detailed schematics to assist your design efforts, please contact your Agere Sales Representative. Agere Systems Inc. 15 Dual Differential Transceivers BTK1A and BTM1A Data Sheet October 2001 Outline Diagrams (continued) 16-Pin SOIC (SOJ) Dimensions are in millimeters. L N B 1 PIN #1 IDENTIFIER ZONE W H SEATING PLANE 0.10 1.27 TYP 0.51 MAX 0.79 MAX 5-4413(F)r.3 Package Description Number of Pins (N) 16 Package Dimensions Maximum Length (L) 10.41 Maximum Width Without Leads (B) 7.62 Maximum Width Including Leads (W) 8.81 Maximum Height Above Board (H) 3.18 SOJ (SmallOutline, J-Lead) Note: The dimensions in this outline diagram are intended for informational purposes only. For detailed schematics to assist your design efforts, please contact your Agere Sales Representative. 16 Agere Systems Inc. Data Sheet October 2001 Dual Differential Transceivers BTK1A and BTM1A The power dissipated in the output is a function of the: s Power Dissipation System designers incorporating Agere data transmission drivers in their applications should be aware of package and thermal information associated with these components. Proper thermal management is essential to the longterm reliability of any plastic encapsulated integrated circuit. Thermal management is especially important for surface-mount devices, given the increasing circuit pack density and resulting higher thermal density. A key aspect of thermal management involves the junction temperature (silicon temperature) of the integrated circuit. Several factors contribute to the resulting junction temperature of an integrated circuit: s s s s s Termination scheme on the outputs Termination resistors Duty cycle of the output s s Package thermal impedance depends on: s s Airflow Package type (e.g., DIP, SOIC, SOIC/NB) The junction temperature can be calculated using the previous equation, after power dissipation levels and package thermal impedances are known. Figure 16 illustrates the thermal impedance estimates for the various package types as a function of airflow. This figure shows that package thermal impedance is higher for the narrow-body SOIC package. Particular attention should, therefore, be paid to the thermal management issues when using this package type. In general, system designers should attempt to maintain junction temperature below 125 C. The following factors should be used to determine if specific data transmission drivers in particular package types meet the system reliability objectives: s s s Ambient use temperature Device power dissipation Component placement on the board Thermal properties of the board Thermal impedance of the package ja and is measured in C rise in junction temperature per watt of power dissipation. Thermal impedance is also a function of airflow present in system application. The following equation can be used to estimate the junction temperature of any device: Tj = TA + PD ja where: Tj is device junction temperature (C). Thermal impedance of the package is referred to as System ambient temperature Power dissipation Package type Airflow s 140 130 THERMAL RESISTANCE ja (C/W) 120 110 100 90 80 70 60 50 40 0 200 DIP 400 600 800 1000 1200 J-LEAD SOIC/GULL WING SOIC/NB TA is ambient temperature (C). PD is power dissipation (W). ja is package thermal impedance (junction to ambient--C/W). The power dissipation estimate is derived from two factors: s s Internal device power Power associated with output terminations Multiplying ICC times VCC provides an estimate of internal power dissipation. AIRFLOW (ft./min.) 12-2753F Figure 16. Power Dissipation Agere Systems Inc. 17 Dual Differential Transceivers BTK1A and BTM1A Data Sheet October 2001 Ordering Information Part Number Driver Receiver Termination* Termination None None None None None None None 220 220 220 220 220 220 220 None None None None None None None 110 110 110 110 110 110 110 Package Type Comcode Former Former Pkg. Part Number Type 1041 1041 1141 1141 1241 1241 41 1041 1041 1141 1141 1241 1241 41 LK, MK LK, MK, -TR LK, MK LK, MK, -TR LK, MK LK, MK, -TR LK, MK LM, MM LM, MM, -TR LM, MM LM, MM, -TR LM, MM LM, MM, -TR LM, MM BTK1A16E BTK1A16E-TR BTK1A16G BTK1A16G-TR BTK1A16NB BTK1A16NB-TR BTK1A16P BTM1A16E BTM1A16E-TR BTM1A16G BTM1A16G-TR BTM1A16NB BTM1A16NB-TR BTM1A16P 16-pin, Plastic SOJ Tape & Reel SOJ 16-pin, Plastic SOIC Tape & Reel SOIC Plastic SOIC/NB Tape & Reel SOIC/NB 16-pin, Plastic DIP 16-pin, Plastic SOJ Tape & Reel SOJ 16-pin, Plastic SOIC Tape & Reel SOIC Plastic SOIC/NB Tape & Reel SOIC/NB 16-pin, Plastic DIP 107950347 107950354 107950362 107950370 107950388 107950396 107950404 107950537 107950545 107950552 107950560 107950578 107950586 107950594 * Indicates on-chip output terminating resistors from each driver output to ground. Indicates on-chip input terminations across receiver inputs. For additional information, contact your Agere Systems Account Manager or the following: INTERNET: http://www.agere.com E-MAIL: docmaster@agere.com N. AMERICA: Agere Systems Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18109-3286 1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106) ASIA: Agere Systems Hong Kong Ltd., Suites 3201 & 3210-12, 32/F, Tower 2, The Gateway, Harbour City, Kowloon Tel. (852) 3129-2000, FAX (852) 3129-2020 CHINA: (86) 21-5047-1212 (Shanghai), (86) 10-6522-5566 (Beijing), (86) 755-695-7224 (Shenzhen) JAPAN: (81) 3-5421-1600 (Tokyo), KOREA: (82) 2-767-1850 (Seoul), SINGAPORE: (65) 778-8833, TAIWAN: (886) 2-2725-5858 (Taipei) EUROPE: Tel. (44) 7000 624624, FAX (44) 1344 488 045 Agere Systems Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. Copyright (c) 2001 Agere Systems Inc. All Rights Reserved October 2001 DS02-011HSI (Replaces DS99-009HSI) |
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